This application claims priority from Korean Patent Application No. 2003-7414, filed on 6 Feb. 2003, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a cache controller of a computer system, and more particularly, simultaneous multithreading of a computer system and method for program recompilation and dynamic extraction of multiple threads.
2. Description of the Related Art
A central processing unit (CPU) is typically pipelined so that several computer instructions are performed simultaneously during a clock cycle, thus improving CPU performance. Still, data dependencies, resource dependencies, control dependencies, and cache misses cause vertical and horizontal wastes during which computer instructions cannot be executed.
In contrast, according to simultaneous multithreading (hereinafter, referred to as SMT), multiple threads reside in the CPU during a clock cycle and the instructions from each thread are executed simultaneously. In particular, the instructions are executed to eliminate vertical and horizontal waste. As a result, the waste is minimized and thus CPU performance is improved. A thread is typically defined as a point of control within a process, a process execution path, or a program. In other words, SMT enables instructions from threads to be executed simultaneously, thereby increasing the rate of instruction execution throughput. U.S. Pat. No. 6,470,443 has disclosed algorithms related to an STM method.
As such, generating threads and processing the generated threads using an SMT processor are key factors for improving computer system performance. A thread generation method is implemented in hardware or software and directly related to the number of threads that are generated by dividing an input program.
When the thread generation method is implemented in hardware, a program sequence is detected by the hardware and the input program is dynamically divided into multiple threads. Therefore, this method is often referred to as dynamic multithreading (DMT). However, this method requires more hardware devices as the complexity of circuit and logic increases, which makes it difficult to implement the thread generation method in hardware.
When the thread generation method is implemented in software, a compiler statically divides the input program into multiple threads. In this case, a user compiles source code or recompiles binary code using an application program. However, this method prevents the user from flexibly manipulating the binary system. Moreover, this method is not suitable in that the user interprets and directly recompiles the binary code.